1. Technical Field
The present invention relates to capacitor mismatch and absolute value measurements and, in particular, to analog built-in self test circuits. Still more particularly, the present invention provides a method and integrated circuit for on-chip capacitor measurement with digital readout.
2. Description of the Related Art
It is advantageous to know accurate capacitor absolute values and capacitor mismatch values of on-chip capacitors. Many analog circuits rely on precise values or ratios of capacitors for proper operation. For example, an analog-to-digital converter (ADC) relies upon capacitor mismatch for correct operation.
Generally, capacitor absolute values and capacitor mismatch values are measured with capacitor/voltage (CV) test equipment. This manual approach is lacking, because a specialized and expensive test setup is needed to place probes on a chip to extract the density of on-chip capacitor structures. This procedure requires that the test structures be accessible by a probe station. Furthermore, capacitor value measurements are so specific and specialized that, in general, no other tests can be performed with this same setup, since the setup is specialized for capacitor value measurements only.
As the size of the unit capacitor gets smaller, the accuracy of the absolute measurement is degraded. When the size of the capacitor decreases, the margin for error also decreases. This, in turn, degrades the accuracy of mismatch calculation.
Therefore, it would be advantageous to provide improved methods and integrated circuits for capacitor absolute value and mismatch measurement.